ISA System Architecture
Download or Read eBook ISA System Architecture PDF written by Tom Shanley and published by Addison-Wesley Professional. This book was released on 1995 with total page 550 pages. Available in PDF, EPUB and Kindle.
| Author | : Tom Shanley |
| Publisher | : Addison-Wesley Professional |
| Total Pages | : 550 |
| Release | : 1995 |
| ISBN-10 | : 0201409968 |
| ISBN-13 | : 9780201409963 |
| Rating | : 4/5 (68 Downloads) |
Book Synopsis ISA System Architecture by : Tom Shanley
Book excerpt: Intro to microprocessor communications - Introduction to the bus cycle - Addressing I/0 and memory - The address decode logic - The 80286 microprocessor - The reset logic - The power-up sequence - The 80286 system kernel : the engine - Detailed view of the 80286 bus cycle - The 80386 DX and SX microprocessors - The 80386 system kernel - Detailed view of the 80386 bus cycles - RAM memory : theory of operation - Cache memory concepts - ROM memory - ISA bus structure - Types of ISA bus cycles - The interrupt subsystem - Direct memory access (DMA) - ISA bus masters - RTC and configuration RAM - Keyboard/mouse interface - Numeric coprocessor - ISA timers.
